SX User’s Manual Rev. 3.1 72 © 2000 Scenix Semiconductor, Inc. All rights reserved. www.scenix.com Chapter 3 Instruction Set 3.6.6 BANK addr8 Load Bank Number into FSR(6:4) Operation: FSR(6:4) = addr8(6:4) Bits affected: none Opcode: 0000 0001 1nnn Description: This instruction loads bits 4, 5, and 6 of the File Select Register (FSR). The high-
order bits of FSR specify the data memory bank number for subsequent memory ac-
cess instructions. You can specify any 3-bit value from 0 to 7. In the syntax of the assembly language, you specify the bank using a full 8-bit data
memory address. The assembler encodes the three high-order bits of this address
into the instruction opcode and ignores the five low-order bits. For the SX18/20/28AC, the bits 4:0 of FSR are left unchanged. For  the  SX48/52BD,  bit  7  and  bits  3:0  of  FSR  are  left  unchanged.  To  switch
between upper and lower bank blocks, you need to set bit 7 of FSR by using the
instruction “setb $04.7” or clear bit 7 by using the instruction “clrb $04.7” after the
“bank” instruction. If  a  skip  instruction  is  immediately  followed  by  BANK  instruction  (and  tested
condition is  true)  then two  instructions  are skipped and  the operation  consumes
three cycles. This is useful for conditional branching to another page where a PAGE
instruction precedes  a  JMP.  If  several  BANK  instructions  immediately  follow  a
skip  instruction  then  they  are  skipped  plus  the  next  instruction  and  a  cycle  is
consumed for each. Special attention required when switching between upper and
lower bank blocks. Cycles: 1 Example: SX18/20/28AC and SX18/20/28AC75: bank $E0 ;select highest bank This example writes the three high-order bits of FSR with 111 and selects Bank 7,
the highest bank.